Techo Rama

The Taiwan Semiconductor Manufacturing Company (TSMC) has announced that its 55nm process technology is ready for use in large scale productions. The new process is a half-node based on the company’s existing 65nm process and should allow all chip designers to move from 65nm to 55nm without any risk and effort. Die sizes are expected to be reduced by 15%, increasing the number of dies per 300mm wafer. This will also save 10%-20% power without any reduction in gate switching speed. The new family will include general purpose and general consumer platforms. The production of 55GP will begin this quarter while the production of 55GC will start later this year. We can expect that ATI and NVIDIA will begin testing the technology soon and the first products using the technology should be available by the end of this year.